154 lines
5.5 KiB
C
154 lines
5.5 KiB
C
#ifndef ADS1298_H_
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#define ADS1298_H_
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#include <stdint.h>
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#include "nrf_drv_spi.h"
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#include "custom_board.h"
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// Debug flag for logging:
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#define ADS1298_LOG_DEBUG 0
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// Number of WRITABLE registers (Not inc. ID register)
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#define ADS1298_REGISTER_COUNT 25
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#define ADS1298_PACKET_OFFSET 2 // [device id][serial id][..data]
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/** REGISTER ADDRESSES **/
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#define ADS1298_REGADDR_ID 0x00
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#define ADS1298_REGADDR_CONFIG1 0x01
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#define ADS1298_REGADDR_CONFIG2 0x02
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#define ADS1298_REGADDR_CONFIG3 0x03
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#define ADS1298_REGADDR_LOFF 0x04
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#define ADS1298_REGADDR_CH1SET 0x05
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#define ADS1298_REGADDR_CH2SET 0x06
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#define ADS1298_REGADDR_CH3SET 0x07
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#define ADS1298_REGADDR_CH4SET 0x08
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#define ADS1298_REGADDR_CH5SET 0x09
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#define ADS1298_REGADDR_CH6SET 0x0A
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#define ADS1298_REGADDR_CH7SET 0x0B
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#define ADS1298_REGADDR_CH8SET 0x0C
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#define ADS1298_REGADDR_RLD_SENSP 0x0D
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#define ADS1298_REGADDR_RLD_SENSN 0x0E
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#define ADS1298_REGADDR_LOFF_SENSP 0x0F
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#define ADS1298_REGADDR_LOFF_SENSN 0x10
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#define ADS1298_REGADDR_LOFF_FLIP 0x11
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#define ADS1298_REGADDR_LOFF_STATP 0x12
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#define ADS1298_REGADDR_LOFF_STATN 0x13
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#define ADS1298_REGADDR_GPIO 0x14
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#define ADS1298_REGADDR_PACE 0x15
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#define ADS1298_REGADDR_RESP 0x16
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#define ADS1298_REGADDR_CONFIG4 0x17
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#define ADS1298_REGADDR_WCT1 0x18
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#define ADS1298_REGADDR_WCT2 0x19
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/** SPI OPCODES **/
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// TODO: Double check!
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#define ADS1298_OPC_WAKEUP 0x02 // Wake up from standby.
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#define ADS1298_OPC_STANDBY 0x04 // Enter standby.
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#define ADS1298_OPC_RESET 0x06 // Reset all registers.
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#define ADS1298_OPC_START 0x08 // Start data conversions.
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#define ADS1298_OPC_STOP 0x0A // Stop data conversions.
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#define ADS1298_OPC_RDATAC 0x10 // Read data continuously (registers cannot be read or written in this mode).
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#define ADS1298_OPC_SDATAC 0x11 // Stop continuous data read.
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#define ADS1298_OPC_RDATA 0x12 // Read single data value.
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#define ADS1298_OPC_RREG 0x20 // Read register value. System must not be in RDATAC mode.
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#define ADS1298_OPC_WREG 0x40 // Write register value. System must not be in RDATAC mode.
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/** FACTORY IDs FOR ADS129x **/
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#define ADS129x_DEVICE_FAMILY_BITMASK 0x80 // 0x[100]10[...]
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#define ADS129xR_DEVICE_FAMILY_BITMASK 0xC0 // 0x[110]10[...]
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#define ADS129x_4CH_BITMASK 0x00 // 0x[...]10[000]
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#define ADS129x_6CH_BITMASK 0x01 // 0x[...]10[001]
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#define ADS129x_8CH_BITMASK 0x02 // 0x[...]10[010]
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/** DEFAULT REGISTER VALUES **/
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//#define ADS1298_REGDEFAULT_CONFIG1 0x05 // Low power mode, Daisy-chain mode, clk output disabled, LP: 250 SPS
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#define ADS1298_REGDEFAULT_CONFIG1 0x46 // Low power mode, Multiple readback mode, clk output disabled, LP: 250 SPS
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#define ADS1298_REGDEFAULT_CONFIG2 0x00 // Test signals
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#define ADS1298_REGDEFAULT_CONFIG3 0xCC //
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#define ADS1298_REGDEFAULT_LOFF 0x00
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#define ADS1298_REGDEFAULT_CH1SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH2SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH3SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH4SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH5SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH6SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH7SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_CH8SET 0x01 // Input Short (for startup)
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#define ADS1298_REGDEFAULT_RLD_SENSP 0x00
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#define ADS1298_REGDEFAULT_RLD_SENSN 0x00
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#define ADS1298_REGDEFAULT_LOFF_SENSP 0x00
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#define ADS1298_REGDEFAULT_LOFF_SENSN 0x00
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#define ADS1298_REGDEFAULT_LOFF_FLIP 0x00
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#define ADS1298_REGDEFAULT_LOFF_STATP 0x00
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#define ADS1298_REGDEFAULT_LOFF_STATN 0x00
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#define ADS1298_REGDEFAULT_GPIO 0x0F
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#define ADS1298_REGDEFAULT_PACE 0x00
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#define ADS1298_REGDEFAULT_RESP 0x00
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#define ADS1298_REGDEFAULT_CONFIG4 0x00
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#define ADS1298_REGDEFAULT_WCT1 0x00
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#define ADS1298_REGDEFAULT_WCT2 0x00
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#define ADS1298_BUFFER_SIZE 64
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#define ADS1298_SETTINGS_SIZE 26
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#define USBD_MAX_SIZE 64
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typedef struct {
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uint8_t nChs; // 4, 6, or 8 channels depending on variant.
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uint8_t state; // Powered on or off!
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uint8_t name_len; // does not include null terminator
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// [active_chs] bit-packed array of active channels 1:8:
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// Chs: [1,2,3,4,5,6,7,8]. Ch1 active |= 0x80, ch2 |= 0x40 and so on..
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uint8_t active_chs;
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uint8_t registers[ADS1298_REGISTER_COUNT];
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char name[12];
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uint8_t id_buffer[6];
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char usb_buffer[USBD_MAX_SIZE];
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uint8_t usb_buffer_count;
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uint8_t usb_buffer_size_max;
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uint32_t drdy_trigger_count;
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} ads1298_info_t;
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/** FUNCTION PROTOTYPES **/
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void ads1298_initialize(ads1298_info_t* p_info);
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void ads1298_uninitialize(void);
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bool ads1298_check_id(ads1298_info_t* p_info);
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void ads1298_update_registers(ads1298_info_t* p_info);
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void ads1298_init_default_registers(void);
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void ads1298_readback_registers(ads1298_info_t* p_info);
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void ads1298_power_down(void);
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void ads1298_power_up(void);
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void ads1298_standby(void);
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void ads1298_wakeup(void);
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void ads1298_soft_start_conversion(void);
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void ads1298_start_rdatac(void);
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void ads1298_stop_rdatac(void);
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void ads1294_get_data(ads1298_info_t* p_info);
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void ads1296_get_data(ads1298_info_t* p_info);
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void ads1298_get_data(ads1298_info_t* p_info);
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uint16_t ads1298_sampling_rate(ads1298_info_t* p_info);
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void ads1298_set_data_buffer_length(ads1298_info_t* p_info);
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#endif // ADS1298_H_
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