#ifndef ADS1298_H_ #define ADS1298_H_ #include #include "nrf_drv_spi.h" // Debug flag for logging: #define ADS1298_LOG_DEBUG 1 // Testing with nRF52840-DK: #define ADS1298_MISO_PIN 29 #define ADS1298_DRDY_PIN 12 #define ADS1298_CS_PIN 19 #define ADS1298_SCK_PIN 11 #define ADS1298_MOSI_PIN 26 #define ADS1298_PWDN_PIN 03 // Number of WRITABLE registers (Not inc. ID register) #define ADS1298_REGISTER_COUNT 25 /** REGISTER ADDRESSES **/ #define ADS1298_REGADDR_ID 0x00 #define ADS1298_REGADDR_CONFIG1 0x01 #define ADS1298_REGADDR_CONFIG2 0x02 #define ADS1298_REGADDR_CONFIG3 0x03 #define ADS1298_REGADDR_LOFF 0x04 #define ADS1298_REGADDR_CH1SET 0x05 #define ADS1298_REGADDR_CH2SET 0x06 #define ADS1298_REGADDR_CH3SET 0x07 #define ADS1298_REGADDR_CH4SET 0x08 #define ADS1298_REGADDR_CH5SET 0x09 #define ADS1298_REGADDR_CH6SET 0x0A #define ADS1298_REGADDR_CH7SET 0x0B #define ADS1298_REGADDR_CH8SET 0x0C #define ADS1298_REGADDR_RLD_SENSP 0x0D #define ADS1298_REGADDR_RLD_SENSN 0x0E #define ADS1298_REGADDR_LOFF_SENSP 0x0F #define ADS1298_REGADDR_LOFF_SENSN 0x10 #define ADS1298_REGADDR_LOFF_FLIP 0x11 #define ADS1298_REGADDR_LOFF_STATP 0x12 #define ADS1298_REGADDR_LOFF_STATN 0x13 #define ADS1298_REGADDR_GPIO 0x14 #define ADS1298_REGADDR_PACE 0x15 #define ADS1298_REGADDR_RESP 0x16 #define ADS1298_REGADDR_CONFIG4 0x17 #define ADS1298_REGADDR_WCT1 0x18 #define ADS1298_REGADDR_WCT2 0x19 /** SPI OPCODES **/ // TODO: Double check! #define ADS1298_OPC_WAKEUP 0x02 // Wake up from standby. #define ADS1298_OPC_STANDBY 0x04 // Enter standby. #define ADS1298_OPC_RESET 0x06 // Reset all registers. #define ADS1298_OPC_START 0x08 // Start data conversions. #define ADS1298_OPC_STOP 0x0A // Stop data conversions. #define ADS1298_OPC_RDATAC 0x10 // Read data continuously (registers cannot be read or written in this mode). #define ADS1298_OPC_SDATAC 0x11 // Stop continuous data read. #define ADS1298_OPC_RDATA 0x12 // Read single data value. #define ADS1298_OPC_RREG 0x20 // Read register value. System must not be in RDATAC mode. #define ADS1298_OPC_WREG 0x40 // Write register value. System must not be in RDATAC mode. /** FACTORY IDs FOR ADS129x **/ #define ADS129x_DEVICE_FAMILY_BITMASK 0x80 // 0x[100]10[...] #define ADS129xR_DEVICE_FAMILY_BITMASK 0xC0 // 0x[110]10[...] #define ADS129x_4CH_BITMASK 0x00 // 0x[...]10[000] #define ADS129x_6CH_BITMASK 0x01 // 0x[...]10[001] #define ADS129x_8CH_BITMASK 0x02 // 0x[...]10[010] /** DEFAULT REGISTER VALUES **/ //#define ADS1298_REGDEFAULT_CONFIG1 0x05 // Low power mode, Daisy-chain mode, clk output disabled, LP: 250 SPS #define ADS1298_REGDEFAULT_CONFIG1 0x46 // Low power mode, Multiple readback mode, clk output disabled, LP: 250 SPS #define ADS1298_REGDEFAULT_CONFIG2 0x00 // Test signals #define ADS1298_REGDEFAULT_CONFIG3 0x40 // #define ADS1298_REGDEFAULT_LOFF 0x00 #define ADS1298_REGDEFAULT_CH1SET 0x00 #define ADS1298_REGDEFAULT_CH2SET 0x00 #define ADS1298_REGDEFAULT_CH3SET 0x00 #define ADS1298_REGDEFAULT_CH4SET 0x00 #define ADS1298_REGDEFAULT_CH5SET 0x00 #define ADS1298_REGDEFAULT_CH6SET 0x00 #define ADS1298_REGDEFAULT_CH7SET 0x00 #define ADS1298_REGDEFAULT_CH8SET 0x00 #define ADS1298_REGDEFAULT_RLD_SENSP 0x00 #define ADS1298_REGDEFAULT_RLD_SENSN 0x00 #define ADS1298_REGDEFAULT_LOFF_SENSP 0x00 #define ADS1298_REGDEFAULT_LOFF_SENSN 0x00 #define ADS1298_REGDEFAULT_LOFF_FLIP 0x00 #define ADS1298_REGDEFAULT_LOFF_STATP 0x00 #define ADS1298_REGDEFAULT_LOFF_STATN 0x00 #define ADS1298_REGDEFAULT_GPIO 0x0F #define ADS1298_REGDEFAULT_PACE 0x00 #define ADS1298_REGDEFAULT_RESP 0x00 #define ADS1298_REGDEFAULT_CONFIG4 0x00 #define ADS1298_REGDEFAULT_WCT1 0x00 #define ADS1298_REGDEFAULT_WCT2 0x00 #define ADS1298_BUFFER_SIZE 64 #define ADS1298_SETTINGS_SIZE 26 typedef struct { uint16_t service_handle; /**< Handle of ble_exg Service (as provided by the BLE stack). */ uint16_t conn_handle; /**< Handle of the current connection (as provided by the BLE stack, is BLE_CONN_HANDLE_INVALID if not in a connection). */ uint8_t uuid_type; /**< UUID type for the ble_exg Service. */ uint8_t exg_ch1_buffer[ADS1298_BUFFER_SIZE]; /**< Buffer for sending data to the peer device. */ uint8_t exg_ch2_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch3_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch4_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch5_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch6_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch7_buffer[ADS1298_BUFFER_SIZE]; uint8_t exg_ch8_buffer[ADS1298_BUFFER_SIZE]; uint8_t ads1298_settings[ADS1298_SETTINGS_SIZE]; uint16_t data_buffer_count; /**< Counter for data buffer. */ uint16_t data_buffer_length; /**< Length of the data buffer. */ } ble_exg_t; typedef struct { uint8_t nChs; // 4, 6, or 8 channels depending on variant. uint8_t state; // Powered on or off! uint8_t name_len; // does not include null terminator // [active_chs] bit-packed array of active channels 1:8: // Chs: [1,2,3,4,5,6,7,8]. Ch1 active |= 0x80, ch2 |= 0x40 and so on.. uint8_t active_chs; uint8_t registers[ADS1298_REGISTER_COUNT]; char name[12]; } ads1298_info_t; /** FUNCTION PROTOTYPES **/ void ads1298_initialize(ble_exg_t *p_exg, ads1298_info_t *p_info); void ads1298_uninitialize(void); bool ads1298_check_id(ble_exg_t *p_exg, ads1298_info_t *p_info); void ads1298_update_registers(ads1298_info_t *p_info); void ads1298_init_default_registers(void); void ads1298_power_down(void); void ads1298_power_up(void); void ads1298_standby(void); void ads1298_wakeup(void); void ads1298_soft_start_conversion(void); void ads1298_start_rdatac(void); void ads1298_stop_rdatac(void); void ads1294_get_data(ble_exg_t *p_exg, uint8_t active_chs); void ads1296_get_data(ble_exg_t *p_exg, uint8_t active_chs); void ads1298_get_data(ble_exg_t *p_exg, uint8_t active_chs); #endif // ADS1298_H_